| Eclipse |
| Vendor: |
Intellitech Corporation |
Tool Website |
Eclipse |
| Suite: |
Design Level:Embedded Test and FPGA Configuration |
Discipline:Boundary Scan Test Generation Tools |
Domain:Electrical |
| Tool Function: |
Test Generation and validation, in-system device programming. Support for embedded test (SystemBIST IC). |
| Tool Inputs: |
PCB netlist(s) (preferably EDIF 2 0 0), BSDL files, device chain description files, TCL scripts, SVF files, WGL files. |
| Tool Outputs: |
Boundary Scan Fault Coverage Reports. SVF based interconnect test files. TCL script files. SystemBIST binary image (SBI) files.
|
| Associated Tools: |
None
|
| Tool Cost Range: $5,000 to $25,000
|
Licensing Term: Single Year License
|
Tool Licensing Mechanism:License options are FlexLm node-locked, server based, or WAN floating.
|
How long has tool been available: Over 5 years
|
| Training: | On-site training available.
|
Contact:| Carl Nielsen |
